The present invention is related generally to signal interface circuitry, and more particularly to interface circuitry for coupling interface signals to a serial data bus in a microprocessor controlled radio transceiver.
In prior art radio control units, as exemplified by those in U.S. Pat. Nos. 3,458,664 and 3,571,519, interface signals from a radio have been accommodated by direction connection to dedicated circuitry of the control unit. However, the need for more sophisticated radio control units has resulted in the use of microprocessors for controlling the operation of the radio, as in U.S. Pat. No. 4,122,304. The radio control signals formerly connected directly to dedicated circuitry of the radio control unit now must be coupled by appropriate interface circuitry to a microprocessor. Commercially available microprocessors, such as the Motorola type MC6800 microprocessor described in U.S. Pat. No. 4,030,079, have associated interface adapters, such as the Motorola type MC6821 interface adapter described in U.S. Pat. No. 3,979,730, for accommodating a number of interface signals. These interface adapters are interconnected to the microprocessor by connection to its internal parallel address and data buses. Because the connection to the address and data buses is made in parallel, a large number of interconnections are required. In addition, clock and timing signals must also be connected to such interface adapters for proper operation. Separate clock and timing signals render the reception of data signals by these interface adapters highly susceptible to falsing due to speed and timing variations. The number of external interconnections can be reduced somewhat by utilizing microprocessors, such as the Motorola MC6801, which include interface circuitry on the same integrated circuit as the microprocessor. However, such single chip microprocessors are severely limited in the number of direct connections that can be made to interface signals and must use conventional interface adapters to accommodate additional interface signals. None of these prior art microprocessor systems accommodate a large number of interface signals while also having relatively few interconnecting signals between the microprocessor and the interface adapters.